http://www.chips.ibm.com/news/news.256meg.html (Einblicke ins Internet, 10/1995)Fishkill, N.Y., June 6, 1995 ... IBM, Siemens A.G. and Toshiba Corporation today announced a major achievement in their joint semiconductor development project -- reporting the smallest and fastest fully-functional 256-megabit Dynamic Random Access Memory (DRAM) chip ever developed.
With a size of 286 square millimeters (less than one half inch) and a memory access time of just 26 nanoseconds (26 billionths of a second), the revolutionary new chip is at least 13 percent smaller and has an access time that is nearly twice as fast as any chip from any other company.
DRAMs are pervasive, fingernail-size silicon devices that store electronic data in products ranging from main- frame computers to home appliances. A 256Mb DRAM can hold more than 25,000 pages of double-spaced (for Europe 16,000 pages 1 1/2 line spaced) typewritten text, or the equivalent of the entire works of William Shakespeare, plus those of Johann Wolfgang Goethe, as well as the Manyoshu, the Kokinshu and the Tale of Genji. There still would be enough bits left to store a typical edition of the International Herald Tribune.
The smaller size and faster speed of the alliance device will help enable future memory-hungry systems such as powerful personal computers and workstations, as well as high-definition digital video, multimedia and telecommunications systems. For OEM developers a smaller, faster chip means improved overall system performance and a reduced footprint for memory on printed circuit boards.
"Strategic alliances with world-class companies like Siemens and Toshiba are a significant part of our business strategy," said Dr. Michael J. Attardo, general manager of IBM's Microelectronics Division(*). "The alliance put together a team of the best scientists, researchers and technicians anywhere, and it delivered world-class results. But this is only the beginning. The best is yet to come."
Jurgen Knorr, senior vice president of Siemens and head of its Semiconductor Group said, "The joint development has demonstrated that the best brains of the three companies can indeed create a leading-edge technology. This enables the companies to stay ahead of the fast moving progress in the semiconductor business even beyond the turn of the century."
"This remarkable breakthrough in advanced research shows what can be achieved by a dedicated alliance of companies that brings leading-edge capabilities to a highly motivated program with clear aims," said Manaobu Ohyama, senior vice president of Toshiba and group executive of its semiconductor group. "The project and its achievements are clearly in the forefront of many international projects for advanced semiconductors. I congratulate all involved."
Researchers from the three companies have been working on the joint development project since January, 1993 at IBM's advanced Semiconductor Research and Development Center in Fishkill, New York. The innovative device, featuring 0.25 micron CMOS process technology, is designed to support any proposed Joint Electron Device Engineering Council (JEDEC) standard for 256Mb DRAMs.
Details of the performance and technology aspects of the chip will be presented at the 1995 Symposium on VLSI Technology, June 6-8, and at the 1995 Symposium on VLSI Circuits, June 8-10, both to be held in Kyoto, Japan.
The three-way alliance that developed the device is an outgrowth of separate, long-standing relationships among the companies. IBM and Siemens currently work together in 16 Mb DRAM manufacturing. IBM, Siemens and Toshiba are partners in 64Mb DRAM development, and a joint venture between IBM Japan and Toshiba manufactures advanced color flat panel computer displays. Toshiba and Siemens have been collaborating in various semiconductor areas, including 1 Mb DRAMS, standard cells and gate arrays.
All three companies have substantial experience in the field of sub-micron semiconductor development. Most notably, each has demonstrated technological leadership in 64Mb DRAMS, which is a key underpinning of the 256Mb chip.
FACT SHEET First fully-functional samples of 256 Mb DRAM
jointly developed by IBM, Siemens and Toshiba Date of publication: June 6, 1995 Chip size 286 mm square (13.25 x 21.55 mm) Technology CMOS 0.25 micron minimum feature 0.55 micron minimum pitch Power Supply 3.3 V / 2.5 V Organization 64M x 4 32M x 8 16M x 16 8M x 32 Access time 26 ns Refresh 8K cycle Memory Cell Trench (Best) Cell Cell Size 0.6 square microns (0.55 x 1.1 micron) Trench Capacitor 35 fF (Femtofarad) Trench Depth 7 micron Functions Fast Page Mode Extended Data Out Self Refresh